Denon PMA-60 Digital Integrated Stereo Amplifier

Description

Denon PMA-60 Digital Integrated Stereo Amplifier – Fully Digital Processing
Since DDFA is a digital input type Class D amplifier, when playing back a digital source, interpolation processing by “Advanced AL32 PP” technology, volume adjustment, amplification, and feedback management is all undertaken in the digital domain. This makes it possible to eliminate the influence of external noise which can become a problem with analogue amplifiers. The end result is a broad soundstage with excellent transparency and resolution.

Bespoke Hi-Fi components taken from Denon’s high-end “NE series”
Denon has employed a number of audio electrolytic capacitors, resistors, film capacitors that are also used in the “NE series”, a new generation of Denon’s renowned Hi-Fi components. These optimum parts are selected by Denon’s lead sound engineer only after repeated auditions. To further refine sound quality, Denon introduced custom parts developed in collaboration with electrolytic capacitors parts manufacturers.

Denon PMA-60 Digital Integrated Stereo Amplifier has Powerful and Detailed Sound
The advanced amplifier section incorporates Qualcomm DDFA® technology for an amazing sound from a compact form factor. The output stage circuit has a discrete construction which realizes higher Signal-to-Noise-ratio and lower distortion compared to conventional class D amplifiers. This advanced amplifier system delivers superior audio fidelity along with high amplifier efficiency at 50W into 4 ohms. The premium grade multi-way speaker connectors let you connect speaker cables via bare wire, pin connectors as well as banana plug connectors.

Master Clock Design
Advanced AL32 Adopt master clock design that operates FPGA and USB digital audio interface with master clock supplied from ultra-low jitter clock placed close to FPGA that performs processing such as Processing Plus. By precisely synchronizing each digital circuit with high quality master clock, high quality reproduction with reduced jitter is realized. In addition, it switches the two systems of clocks of the 44.1 kHz system and the 48 kHz system according to the sampling rate of the input signal, and supplies the clock of the optimum frequency. By eliminating jitter due to non-integral multiplication, waveform fluctuation in the time axis direction is suppressed and perform ideal signal processing.